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[1]
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Axel Jantsch.
Goal management in self-aware cyber-physical systems.
Invited Presentation at the oCPS Fall School, October 2019.
[ .pdf ]
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[2]
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Axel Jantsch.
Self-aware cyber-physical systems.
Summer Course at PUCRS, September 2019.
[ .pdf ]
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[3]
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Axel Jantsch.
Self-aware cyber-physical systems.
Invited Presentation at the Huawei Vision Forum, September 2019.
[ .pdf ]
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[4]
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Axel Jantsch.
Self-aware cyber-physical systems.
Summer School on Cyber-Physical Systems and Internet-of-Things, June
2019.
Budva, Montenegro.
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[5]
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Axel Jantsch, Nima Taherinejad, Amir Rahmani, Lukas Esterle, and Peter Lewis.
Resource constrained self-aware cyber-physical systems.
Tutorial on Foundations and Applications of Self* Systems, June 2019.
Umeå, Sweden.
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[6]
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Axel Jantsch.
Towards a formal model of recursive self-reflection.
SAINT Workshop on Self-Aware and Autonomous Systems, May 2019.
Southern University of Science and Technology, Shenzhen, China.
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[7]
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Axel Jantsch.
Towards a formal model of recursive self-reflection.
International Workshop on Autonomous Systems Design (ASD), March
2019.
DATE Workshop.
[ .pdf ]
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[8]
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Axel Jantsch.
Self-aware cyber-physical systems.
oCPS Webinar, February 2019.
[ .pdf ]
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[1]
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Axel Jantsch.
Dynamic resource allocation for many-core socs.
Presentation at Huawei Sweden 5G IC Design Trend Workshop, October
2017.
[ .pdf ]
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[2]
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Axel Jantsch.
Self-aware silicon.
Keynote at the Chips on the Sands Conference, August 2017.
[ .pdf ]
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[3]
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Axel Jantsch and Christian Krieg.
Self awareness and resilience against faults, bugs, and attacks.
Tutorial at the Spring Test School and the European Test Symposium,
May 2017.
[ .pdf ]
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[4]
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Arman Anzanpour, Iman Azimi, Maximilian Götzinger, Amir M. Rahmani, Pasi
Liljeberg, Nima TaheriNejad, Axel Jantsch, and Nikil Dutt.
Self-awareness in remote health monitoring systems using wearable
electronics.
Presentation at DATE 2017, March 2017.
[ .pdf ]
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[1]
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Axel Jantsch.
The it and the self - challenges and opportunities in cyber-physical
systems.
Lecture at the EIT/KTH Summer School on Cyber Physical Systems, June
2015.
[ .pdf ]
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[2]
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Axel Jantsch and Nikil Dutt.
Self-awareness in cyber-physical systems.
Invited talk at the special session on “Beyond Self-Aware Embedded
Computing” at the HiPEAC Computing Week, Oslo, Norway, May 2015.
[ .pdf ]
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[3]
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Axel Jantsch.
Three walls and network on chip.
Invited Seminar at UESTC, Chengdu, China, April 2015.
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[4]
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Axel Jantsch.
Critical research areas driven by industry transformations.
Panel presentation at DATE 2015, March 2015.
[ .pdf ]
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[5]
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Axel Jantsch.
A framework for self-awareness in artificial subjects.
Invited seminar at Brno University of Technology, March 2015.
[ .pdf ]
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[6]
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Axel Jantsch.
Introduction to networks on chip.
Lecture in the Course Fachvertiefung at TU Vienna, March 2015.
[ .pdf ]
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[1]
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Axel Jantsch.
Introduction to networks on chip.
Guest Lecture in the Course Fachvertiefung at TU Vienna, December
2014.
[ .pdf ]
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[2]
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Axel Jantsch and Kalle Tammemäe.
A framework for self-awareness in cyberphysical systems.
Invited Seminar at TU Eindhoven, The Netherlands, November 2014.
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[3]
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Axel Jantsch and Kalle Tammemäe.
A framework for self-awareness in cyberphysical systems.
Invited Seminar at UESTC in Chengdu, China, November 2014.
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[4]
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Axel Jantsch and Kalle Tammemäe.
A framework for self-awareness in artificial subjects.
Special Session Presentation at the International Conference on
Hardware/Software Codesign and System Synthesis, October 2014.
[ .pdf ]
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[1]
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Axel Jantsch.
The Rise and Fall of SoC.
Distinguished Lecture Series at Turku University, October 2013.
[ .pdf ]
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[2]
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Dinesh Pamunuwa, Matt Grange, Axel Jantsch, Sunil Rana, and Tyson Tian Qin.
System performance analysis for hterogeneous 3-D ICs and emerging
technologies.
Invited talk at the Design for 3D Silicon Integration Workshop, June
2013.
[ .pdf ]
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[3]
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Axel Jantsch, Awet Yemane Weldezion, Dinesh Pamunuwa, and Matt Grange.
The zero-load predictive model for 3D NoCs.
Invited talk at the Design for 3D Silicon Integration Workshop, June
2013.
[ .pdf ]
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[1]
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Axel Jantsch, Marco Bekooij, Alan Burns, Abbas E. Kiasari, and Zhonghai Lu.
Analytical approaches for performance evaluation of networks on chip.
ESWeek Tutorial, October 2012.
[ http ]
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[2]
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Axel Jantsch.
Memory architectures in heterogeneous multicore SoCs.
European Nanoelectronics Design Technology Conference, June 2012.
[ .pdf ]
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[3]
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Martin Radetzki, Xueqian Zhao, Chaochao Feng, and Axel Jantsch.
Fault tolerance in networks on chip.
Tutorial at the Network on Chip Symposium 2012, May 2012.
[ .pdf ]
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[1]
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Axel Jantsch.
Computational limits in 3-d integrated systems.
Keynote at the International Symposium on Systems on Chip, November
2011.
[ .pdf ]
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[2]
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Axel Jantsch.
ForSyDe: A formal framework for heterogeneous models of
computation.
Invited tutorial at the International Symposium on Systems on Chip,
November 2011.
[ .pdf ]
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[3]
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Axel Jantsch.
ForSyDe: A formal framework for heterogeneous models of
computation.
Invited Seminar at the Shenzhen Institute of Advanced Technology,
Chinese Acadamy of Science, September 2011.
[ .pdf ]
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[4]
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Axel Jantsch.
Shared memories in multiprocessors.
Lecture at the Shenzhen Summer School on Embedded Systems, July 2011.
[ .pdf ]
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[5]
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Axel Jantsch.
Predictable communication performance in on-chip networks.
Invited Seminar at University of Technology Vienna, June 2011.
[ .pdf ]
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[6]
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Axel Jantsch, Xiaowen Chen, Zhonghai Lu, Chaochao Fao, Abdul Nameed, Yang
Zhang, and Ahmed Hemani.
Memory architecture and management in a NoC platform.
Tutorial at Design Automation and Test Conference (DATE), March 2011.
[ .pdf ]
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[1]
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Axel Jantsch, Matthew Grange, and Dinesh Pamunuwa.
Promises and limitations of 3-D integration.
Seminar at NUDT, Changsha, China, December 2010.
[ .pdf ]
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[2]
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Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sandro Penolazzi, and
Zhonghai Lu.
Memory architecture and management in a NoC platform.
Seminar at Nanjing University, Nanjing, China, December 2010.
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[3]
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Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sandro Penolazzi, and
Zhonghai Lu.
Memory architecture and management in a NoC platform.
Seminar at Fudan University, Shanghai, China, December 2010.
[ .pdf ]
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[4]
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Axel Jantsch.
Predictable communication performance in on-chip networks.
Docent Lecture at University of Turku, Finland, December 2010.
[ .pdf ]
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[5]
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Axel Jantsch.
Network on chip.
Seminar at the Huawei-Fudan Workshop, Shanghai, China, December 2010.
[ .pdf ]
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[1]
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Axel Jantsch and Zhonghai Lu.
Trends in terascale on-chip computing 2010-2020.
Invited Seminar at the ICES annual conference, September 2009.
[ .pdf ]
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[2]
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Axel Jantsch and Zhonghai Lu.
Trends in terascale on-chip computing 2010-2020.
Invited Seminar at Nanjing University, July 2009.
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[3]
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Axel Jantsch and Zhonghai Lu.
Networks on chip.
Short course at Fudan University, June 2009.
[ .pdf ]
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[4]
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Axel Jantsch et al.
The Nostrum network on chip.
Invited Seminar at Fudan University, June 2009.
[ .pdf ]
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[5]
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Axel Jantsch.
Resource allocation for quality of service on-chip communication.
Invited seminar at the real Time Research Center in Vasteras, Sweden,
February 2009.
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[6]
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Axel Jantsch.
Resource allocation for quality of service on-chip communication.
Invited seminar at the University of Cantabria, Santander, Spain,
February 2009.
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[1]
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Axel Jantsch and Zhonghai Lu.
Quality of service in networks on chip.
Invited Seminar at the Research Center Telecommunciation Vienna
(FTW), April 2008.
[ .pdf ]
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[2]
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Axel Jantsch.
Nostrum network on chip.
Invited Seminar at the Turku center of Computer Science, April 2008.
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[3]
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Axel Jantsch.
A formal framework for heterogeneous models of computation.
Tutorial on Heterogeneous System Level Specification using
SystemC given by Eugenio Villar, Axel Jantsch, Christoph Grimm and Tim Kogel
at Design Automation and Test Conference (DATE), March 2008.
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[4]
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Axel Jantsch.
Network layer communication performance in networks on chip.
Tutorial at the Asian Pacitific Design Automation Conference given by
Axel Jantsch and Dave Gwilt, January 2008.
[ .pdf ]
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[1]
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Zhonghai Lu and Axel Jantsch.
Slot allocation using logical networks for TDM virtual circuit
configuration for network-on-chip.
Invited Seminar at Eindhoven University of Technology, November 2007.
[ .pdf ]
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[2]
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Axel Jantsch.
The nostrum network on chip.
Invited Seminar at Turku Center for Computer Science, November 2007.
[ .pdf ]
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[3]
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Axel Jantsch.
Performance analysis and dimensioning of bandwidth and buffer
capacity.
Section I of Full Day Tutorial on Networks on Chip given by
Axel Jantsch, Luca Benini and Radu Marculescu at the NoC Symposium 2007, May
2007.
[ .pdf ]
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[4]
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Axel Jantsch.
NoC: State of the art, trends and challenges.
Section I of Full Day Tutorial NoC at the Age of Six: Advanced
Topics, Current Challenges and Trends given by Axel Jantsch, Luca Benini,
Timothy M. Pinkston, Kees Goossens, Pieter van der Wolf, Alian Fanet and
Marcello Coppola at DATE 2007, April 2007.
[ .pdf ]
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[5]
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Axel Jantsch.
Models of computation for networks on chip.
Invited Seminar at IMEC, February 2007.
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[1]
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Axel Jantsch.
Models of computation for networks on chip.
Invited Seminar at VirginiaTech, November 2006.
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[2]
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Axel Jantsch.
ForSyDe: A denotational framework for heterogeneous models of
computation.
Invited Presentation at the ARTIST workshop Models of Computation and
Communication, November 2006.
[ .pdf ]
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[3]
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Axel Jantsch.
Communication performance in network-on-chips.
Short course at Tallinn Technical University, October 2006.
[ .pdf ]
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[4]
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Axel Jantsch.
Compositional traffic in networks on chip.
Invited presentation at the Baltic Electronic Conference, October
2006.
[ .pdf ]
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[5]
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Tiberius Seceleanu, Axel Jantsch, and Hannu Tenhunen.
On-chip distributed architectures.
Tutorial at the International SoC Conference, September 2006.
Austin, Texas.
[ .pdf ]
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[6]
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Axel Jantsch.
Models of computation for networks on chip.
Invited talk at the Sixth International Conference on Application of
Concurrency to System Design, June 2006.
[ .pdf ]
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[7]
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Axel Jantsch.
Exchange of course modules across universities.
Invited presentation at the 6th European Workshop on Microelectronic
Education, June 2006.
[ http ]
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[8]
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Axel Jantsch.
Standards for NoC: What can we gain?
Invited presentation at the Workshop on Future Interconnect and NoC,
March 2006.
[ .pdf ]
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[1]
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Axel Jantsch.
The Nostrum network on chip.
Invited presentation at the International Symposium on
System-on-Chip, Tampere, Finland, November 2005.
[ .pdf ]
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[2]
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Axel Jantsch.
NoC: A new contract between hardware and software?
Invited seminar at Lancaster University, October 2005.
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[3]
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Axel Jantsch.
The Nostrum network on chip.
Invited presentation at Lancaster University, October 2005.
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[4]
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Axel Jantsch, Robert Lauter, and Arseni Vitkowski.
Power analysis of link level and end-to-end protection in networks on
chip.
Invited presentation for the special session on Networks on Chip at
ISCAS, May 2005.
[ .pdf ]
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[5]
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Axel Jantsch.
The nostrum network on chip.
Invited Seminar at Ã…bo Akademi, Turku, Finland, March 2005.
[ .pdf ]
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[1]
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Axel Jantsch.
The nostrum network on chip.
Guest lecture in the SoC Architecxture course, KTH, December 2004.
[ .pdf ]
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[2]
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Axel Jantsch.
The nostrum network on chip.
Invited seminar at Linköping University - Part III, November 2004.
[ .pdf ]
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[3]
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Axel Jantsch.
Communication performance in networks on chip.
Invited seminar at Linköping University - Part II, November 2004.
[ .pdf ]
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[4]
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Axel Jantsch.
Networks on chip.
Invited seminar at Linköping University - Part I, November 2004.
[ .pdf ]
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[5]
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Axel Jantsch.
The nostrum network on chip.
LECS Seminar, KTH, September 2004.
[ .pdf ]
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[1]
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Axel Jantsch.
System specification fundamentals.
Invited presentation at the Medea+ conference, November 2003.
[ http ]
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[2]
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Axel Jantsch.
The Nostrum network on chip.
Invited presentation at ProRISC, November 2003.
[ .pdf ]
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[3]
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Axel Jantsch.
NoCs: A new contract between hardware and software.
Keynote at the Euromicro Symposium on Digital System Design,
September 2003.
[ .pdf ]
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[4]
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Axel Jantsch.
Communication performance in network-on-chips.
Presentation at the Swedish INTELECT Summer School on Multiprocessor
Systems on Chip, August 2003.
[ .pdf ]
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[5]
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Axel Jantsch.
Communication refinement for a network-on-chip platform.
Presentation at the International Seminar on Application-Specific
Multi-Processor SoC (MPSOC), July 2003.
[ .pdf ]
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[6]
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Axel Jantsch.
Will networks on chip close the productivity gap?
Presentation at the "Special Topics in SoC" Course at KTH (4h), May
2003.
[ .pdf ]
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[7]
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Axel Jantsch.
Networks on chip - status of Nostrum.
Invited Presentation at Darmstadt University of Technology, April
2003.
[ .pdf ]
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[8]
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Axel Jantsch.
What is a good platform?
Presentation at the EDA Gruppen Meeting, February 2003.
[ .pdf ]
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[1]
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Axel Jantsch.
Networks on chip.
Presentation at the SoC Architecture Course at KTH, December 2002.
[ .pdf ]
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[2]
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Axel Jantsch.
Network on chip architecture.
Presentation at the EXCITE Workshop, Helsinki, November 2002.
[ http ]
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[3]
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Axel Jantsch.
Networks on chip: A paradigm change?
Presentation at the SOCWare Day, Kista, November 2002.
[ http ]
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[4]
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Axel Jantsch.
Networks on chip.
Presentation at the Conference RadioVetenskap och Kommunikation, June
2002.
[ http ]
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[5]
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Axel Jantsch.
A template for distance learning courses without loss of quality.
Presentation at the SoC SME Workshop, April 2002.
[ http ]
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[1]
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Axel Jantsch.
Embedded software/system in the SOC Master program.
Presentation at the Socware Education workshop, November 2001.
[ .pdf ]
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[2]
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Axel Jantsch.
Models of computation in embedded system design (50 min).
Presentation at the the Department of Computer Science at Linköping
University, September 2001.
[ .pdf ]
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[3]
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Axel Jantsch.
Network-on-chip architectures (30min).
Workshop at the European Solid-State Circuit Conference (ESSCIRC),
Villach, Austria, September 2001.
[ .pdf ]
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[4]
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Axel Jantsch.
Introduction to networks on chip (30min).
Workshop at the European Solid-State Circuit Conference (ESSCIRC),
Villach, Austria, September 2001.
[ .pdf ]
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[5]
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Axel Jantsch.
Industrial ph.d. projects (30min).
Presentation at the Industrial Research Seminar at SaabTech,
Stockholm, Sweden, September 2001.
[ http ]
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[6]
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Axel Jantsch.
System modelling and SDL-Matlab cosimulation (2h).
Presentation at the Eurotraining System-on-Chip Course, Stockholm,
Sweden, May 2001.
[ .pdf ]
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[7]
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Axel Jantsch.
HW/SW codesign (4h).
Presentation at Jönköping University, May 2001.
[ .pdf ]
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[8]
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Axel Jantsch.
System modelling - models of concurrency and their applications (4h).
Presentation at Jönköping University, April 2001.
[ http ]
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[9]
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Axel Jantsch.
The usage of stochastic processes in embedded system specifications.
Presentation at the HW/SW Codesign Symposium in Copenhagen (20 min),
April 2001.
[ http ]
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[10]
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Axel Jantsch.
International master of science program in system-on-chip design at
KTH.
Presentation at System-on-Chip Design at the Graz University of
Technology (10 min), April 2001.
[ http ]
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[11]
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Axel Jantsch.
System modelling - models of computation and their applications.
Presentation at System-on-Chip Design at the Graz University of
Technology (50 min), April 2001.
[ http ]
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[12]
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Axel Jantsch.
Introduction to Haskell and ForSyDe.
Presentation at KTH (1h), March 2001.
[ http ]
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[1]
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Axel Jantsch.
Network on a chip - an architecture for the billion transistor era
(30 min).
Presentation at IEEE NorChip Conference, Turku, Finland, November
2000.
[ http ]
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[2]
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Axel Jantsch.
System-on-chip education (15 min).
Panel Presentation at NorChip 2000, Turku, Finland, November 2000.
[ http ]
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[3]
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Axel Jantsch.
System modelling and SDL-Matlab cosimulation (2h).
Presentation at the Eurotraining System-on-Chip Course, Copenhagen,
Denmark, October 2000.
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[4]
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Axel Jantsch.
Electronic design automation - the next 50 years (1h).
Docent lecture at KTH, Stockholm, Sweden, June 2000.
[ .pdf ]
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[5]
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Axel Jantsch.
System modelling and SDL-Matlab cosimulation (2h).
Presentation at the Eurotraining System-on-Chip Course, Grenoble,
France, May 2000.
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