[1]	Huimin She, Zhonghai Lu, Axel Jantsch, Li-Rong Zheng, and Dian Zhou. Traffic splitting with network calculus for mesh sensor networks. In Proceedings of the Future Generation Communication and Networking (FGCN), December 2007. [ bib | .pdf ]
[2]	Zhonghai Lu and Axel Jantsch. Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip. In International Conference on Computer Aided Design (ICCAD), November 2007. [ bib | .pdf ]
[3]	Tomas Henriksson, Pieter van der Wolf, Axel Jantsch, and Alistair Bruce. Network calculus applied to verification of memory access performance in SoCs. In Proceedings of the 5th IEEE Workshop on Embedded Systems for Real-Time Multimedia, October 2007. [ bib | .pdf ]
[4]	Iyad Al-Khatib, Davide Bertozzi, Axel Jantsch, and Luca Benini. Performance analysis and design space exploration for high-end biomedical applications: Challenges and solutions. In Proceedings of the International Conference on Hardware - Software Codesign and System Synthesis, September 2007. [ bib | .pdf ]
[5]	Zhonghai Lu and Axel Jantsch. Admitting and ejecting flits in wormhole-switched networks on chip. IET Computers & Digital Techniques, 5(1):546--556, September 2007. [ bib ]
[6]	Tarvo Raudvere, Ingo Sander, and Axel Jantsch. Synchronization after design refinements with sensitive delay elements. In Proceedings of the International Conference on HW/SW Codesign and System Synthesis, Salzburg, Austria, September 2007. [ bib | .pdf ]
[7]	Andreas Herrholz, Frank Oppenheimer, P. A. Hartmann, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, J. Haase, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, and Marcos Martinez. The ANDRES project: Analysis and design of run-time reconfigurable, heterogeneous systems. In Proceedings of the The International Conference on Field-Programmable Logic, Reconfigurable Computing, and Applications (FPL), August 2007. [ bib | .pdf ]
[8]	Deepak Mathaikutty, Hiren Patel, Sandeep Shukla, and Axel Jantsch. EWD: A metamodeling driven customizable multi-moc system modeling framework. ACM Transactions on Design Automation of Embedded Systems, 12(3), August 2007. [ bib | .pdf ]
[9]	Mickael Millberg and Axel Jantsch. Increasing NoC performance and utilisation using a dualpacket exit strategy. In 10th Euromicro Conference on Digital System Design, Lubeck, Germany, August 2007. [ bib | .pdf ]
[10]	Zhonghai Lu, Ming Liu, and Axel Jantsch. Layered switching for networks on chip. In Proceedings of the Design Automation Conference, June 2007. [ bib | .pdf ]
[11]	Per Badlund and Axel Jantsch. An analytical approach for dimensioning mixed traffic networks. In Proceedings of the 1st Symposium on Networks on Chip, May 2007. poster. [ bib | .pdf ]
[12]	Andre Ivanov Cristian Grecu and, Partha Pande, Axel Jantsch, Erno Salminen, Umit Ogras, and Radu Marculescu. Towards open network-on-chip benchmarks. In Proceedings of First International Symposium on Networks-on-Chip, May 2007. [ bib | .pdf ]
[13]	Zhonghai Lu, Jonas Sicking, Ingo Sander, and Axel Jantsch. Using synchronizers for refining synchronous communication onto hardware/software architectures. In Proceedings of the 18th IEEE/IFIP International Workshop on Rapid System Prototyping, Porto Alegre, Brasil, May 2007. [ bib | .pdf ]
[14]	Mickael Millberg and Axel Jantsch. Improvements of performance and use of buffers in NoCs using dual packet exit. In Proceedings of the 1st Symposium on Networks on Chip, May 2007. poster. [ bib | .pdf ]
[15]	Andreas Herrholz, Frank Oppenheimer, Andreas Schallenberg, Wolfgang Nebel, Christoph Grimm, Markus Damm, Fernando Herrera, Eugenio Villar, Ingo Sander, Axel Jantsch, Anne-Marie Fouilliart, and Marcos Martinez. ANDRES - analysis and design of run-time reconfigurable, heterogeneous systems. In Workshop on Reconfigurable Systems at DATE, April 2007. [ bib | .pdf ]
[16]	Iyad Al Khatib, Davide Bertozzi, Francesco Poletti, Luca Benini, Axel Jantsch, Mohamed Bechara, Hasan Khalifeh, Mazen Hajjar, Rustam Nabiev, and Sven Jonsson. Hardware/software architecture for real-time ECG monitoring and analysis leveraging MPSoC technology. Transactions on High-Performance Embedded Architectures and Compilers (HiPEAC), I(1):239--258, 2007. LNCS 4050. [ bib | .pdf ]
[17]	Ming Liu, Wolfgang Kuehn, Zhonghai Lu, Axel Jantsch, Shuo Yang, Tiago Perez, and Zhenan Liu. Hardware/software co-design of a general-purpose computation platform in particle physics. In Proceedings of the ICFPT, 2007. [ bib | .pdf ]
[18]	Tarvo Raudvere, Ingo Sander, and Axel Jantsch. A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops. In Proceedings of the Great Lake Symposium on VLSI (GLSVLSI), 2007. [ bib | .pdf ]
[19]	Ingo Sander and Axel Jantsch. Modelling adaptive systems in ForSyDe. In Proceedings of the First Workshop on Verification of Adaptive Systems (VerAS), pages 39--54, Kaiserslauten, 2007. [ bib | .pdf ]
[20]	Huimin She, Zhonghai Lu, Axel Jantsch, and Dian Zhou. A network-based system architecture for remote medical applications. In Proceedings of the Asia-Pacific Advanced Network Meeting, 2007. [ bib | .pdf ]