[1]	Matt Grange, Axel Jantsch, Roshan Weerasekera, and Dinesh Pamunuwa. Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning. In Proceedings of the International Conference on CAD (ICCAD), San Jose, CA, USA, November 2011. [ bib | .pdf ]
[2]	Chaochao Feng, Jinwen Li, Zhonghai Lu, Axel Jantsch, and Minxuan Zhang. Evaluation of deflection routing on various NoC topologies. In Proceedings of the IEEE International Conference on ASIC (ASICON), Xiamen, China, October 2011. [ bib | .pdf ]
[3]	Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu, Botao Zhang, and Dongpei Liu. Network-on-chip multicasting with low latency path setup. In Proceedings of the VLSI-SoC Conference, October 2011. [ bib | .pdf ]
[4]	Fahimeh Jafari, Axel Jantsch, and Zhonghai Lu. Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling. In Proceedings of the International Conference on Computer Design, Amherst, Massachusetts, USA, October 2011. [ bib | .pdf ]
[5]	Dinesh Pamunuwa, Matthew Grange, Roshan Weerasekera, and Axel Jantsch. 3-D integration and the limits of silicon computation. In Proceedings of the International Conference on Very Large Scale Integration (VLSI-SoC), Hong Kong, October 2011. Invited Talk. [ bib | .pdf ]
[6]	Meganathan Deivasigamani, Shaghayeghsadat Tabatabaei, Naveed Mustafa, Hamza Ijaz, Haris Bin Aslam, Shaoteng Liu, and Axel Jantsch. Concept and design of exhaustive-parallel search algorithm for Network-on-Chip. In Proceedings of the International SoC Conference, pages 150--155, September 2011. [ bib | .pdf ]
[7]	Abdul Naeem, Axel Jantsch, Xiaowen Chen, and Zhonghai Lu. Realization and scalability of release and protected release considtency models in noc based systems. In Proceedings of the Euromicro Conference on Digital Systems Design (DSD), Oulu, Finland, September 2011. [ bib | .pdf ]
[8]	Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Jinwen Li, and Jiang Jiang. A low-overhead fault-aware deflection routing algorithm for 3D network-on-chip. In Proceedings of the IEEE Annual Symposium on VLSI (ISVLSI), Chennai, India, July 2011. [ bib | .pdf ]
[9]	Ming Liu, Zhonghai Lu, Wolfgang Kuehn, and Axel Jantsch. FPGA-based particle recognition in the HADES experiment. Design and Test of Computers, July-August 2011. [ bib | .pdf ]
[10]	Matt Grange, Roshan Weerasekera, Dinesh Pamunuwa, Axel Jantsch, and Awet Yemane Weldezione. Optimal network architectures for minimizing average distance in k-ary n-dimensional mesh networks. In Proceedings of the Networks on Chip Symposium (NoCS), Pittsburgh, Pennsylvania, USA, May 2011. [ bib | .pdf ]
[11]	Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, and Li-Rong Zheng. Modeling and analysis of rayleigh fading channels using stochastic network calculus. In Proceedings of IEEE Wireless Communication and Networking Conference (WCNC2011, Mexico, April 2011. [ bib | .pdf ]
[12]	Ming Liu, Wolfgang Kuehn, Soeren Lange, Shua Yang, Johannes Roskoss, Zhonghai Lu, Axel Jantsch, Qiang Wang, Hao Xu, Dapeng Jin, and Zhenan Liu. A high-end reconfigurable computation platform for nuclear and particle physics experiments. Computing in Science and Engineering, 13(2):52--63, March-April 2011. [ bib | .pdf ]
[13]	Ming Liu, Zhonghai Lu, Wolfgang Kuehn, and Axel Jantsch. FPGA-based cherenkov ring recognition in nuclear and particle physics experiments. In Proceedings of the 7th International Symposium on Applied Reconfigurable Computing, belfast, UK, March 2011. [ bib | .pdf ]
[14]	Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Zhonghai Lu, Dimitrios Soudris, and Axel Jantsch. Custom microcoded dynamic memory management for distributed on-chip memory organizations. IEEE Embedded Systems Letters, 2011. [ bib | .pdf ]
[15]	Bernard Candaele, Sylvain Aguirre, Michel Sarlotte, Iraklis Anagnostopoulos, Sotirios Xydis, Alexandros Bartzas, Dimitris Bekiaris, Dimitrios Soudris, Zhonghai Lu, Xiaowen Chen, Jean-Michel Chabloz, Ahmed Hemani, Axel Jantsch, Geert Vanmeerbeeck, Jari Kreku, Kari Tiensyrja, Fragkiskos Ieromnimon, Dimitrios Kritharidis, Andreas Wiefrink, Bart Vanthournout, and Philippe Martin. The MOSART mapping optimization for multi-core architectures. In Designing Very Large Scale Integration Systems: Emerging Trends and Challenges. Springer, 2011. [ bib | .pdf ]
[16]	Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, and Hai Liu. Cooperative communication based barrier synchronization in on-chip mesh architectures. IEICE Electronics Express, 8(22):1856--1862, 2011. [ bib | www: ]
[17]	Wenmin Hu, Zhonghai Lu, Axel Jantsch, and Hengzhu Liu. Power-efficient tree-based multicast support for networks-on-chip. In Proceedings of the Asian Pacific Design Automation Conference (ASPDAC), Tokyo, Japan, January 2011. [ bib | .pdf ]
[18]	Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sandro Penolazzi, and Zhonghai Lu. Memory architecture and management in an NoC platform. In Axel Jantsch and Dimitrios Soudris, editors, Scalable Multi-core Architectures: Design Methodologies and Tools. Springer, 2011. [ bib | .pdf ]
[19]	Axel Jantsch, Matthew Grange, and Dinesh Pamunuwa. The promises and limitations of 3-D integration. In Abbas Sheibanyrad, Frédéric Pétrot, and Axel Jantsch, editors, 3D Integration for NoC-based SoC Architectures, Integrated Circuits and Systems, chapter 2. Springer, 2011. [ bib | .pdf ]
[20]	Ming Liu, Zhonghai Lu, Wolfgang Kuehn, and Axel Jantsch. Adaptively reconfigurable controller for the flash memory. In Book of Flash Memory. InTech, 2011. ISBN: 978-953-307-272-2. [ bib | .pdf ]
[21]	Abdul Naeem, Xiaowen Chen, Zhonghai Lu, and Axel Jantsch. Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems. In Proceedings of the 16th Asian Pacific Design Automation Conference (ASP-DAC), Tokyo, Japan, January 2011. [ bib | .pdf ]
[22]	Huimin She, Zhonghai Lu, Axel Jantsch, Dian Zhou, and Li-Rong Zheng. Stochastic coverage in event-driven sensor networks. In Proceedings of the IEEE Symposium on Personal, Indoor, Mobile and Radio Communications (PIMRC), Toronto, Canada, 9 2011. [ bib ]
[23]	Axel Jantsch and Dimitrios Soudris, editors. Scalable Multi-core Architectures: Design, Methodologies, and Tools. Springer, 2011. [ bib ]
[24]	Abbas Sheibanyrad, Frédéric Pétrot, and Axel Jantsch, editors. 3D Integartion for NoC-based SoC Architectures. Integrated Circuits and Systems. Springer, January 2011. [ bib | http ]