[1]
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Per Bjuréus and Axel Jantsch.
Modeling of mixed control and dataflow systems in MASCOT.
IEEE Transactions on Very Large Scale Integration (VLSI)
Systems, 9(5):690--704, October 2001.
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[2]
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Per Bjuréus and Axel Jantsch.
Performance analysis with confidence intervals for embedded software
processes.
In Proceedings of the International Symposium on System
Synthesis (ISSS), October 2001.
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.pdf ]
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[3]
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Abhijit K. Deb, Johnny Öberg, and Axel Jantsch.
Control and communication performance analysis of embedded DSP
systems in the MASIC methodology.
In Proceedings of the International Symposium on System
Synthesis (ISSS), October 2001.
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.pdf ]
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[4]
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Axel Jantsch, Juha-Pekka Soininen, Martti Forsell, Li-Rong Zheng, Shashi Kumar,
Mikael Millberg, and Johnny Öberg.
Networks on chip.
In Workshop at the European Solid State Circuits Conference,
September 2001.
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[5]
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Johnny Öberg, Mattias O'Nils, Axel Jantsch, Adam Postula, and Ahmed Hemani.
Grammar-based design.
Journal of Systems Architecture, 47(3-4):225--240, April 2001.
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[6]
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Axel Jantsch, Ingo Sander, and Wenbiao Wu.
The usage of stochastic processes in embedded system specifications.
In Proceedings of the Ninth International Symposium on
Hardware/Software Codesign, April 2001.
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.pdf ]
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[7]
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Mattias O'Nils and Axel Jantsch.
Device driver and DMA controller synthesis from HW/SW
communication protocol specifications.
Design Automation of Embedded Systems, 6(2):177 -- 207, April
2001.
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.pdf ]
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[8]
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Per Bjuréus and Axel Jantsch.
Heterogenous system-level cosimulation with SDL and Matlab.
In Jean Mermet, editor, Electronic Chips & System Design
Languages, chapter 12, pages 145--157. Kluwer Academic Publisher, 2001.
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.pdf ]
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[9]
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A. Jantsch, S. Kumar, I. Sander, B. Svantesson, J. Öberg, A. Hemani, Peeter
Ellervee, and Mattias O'Nils.
A comparison of six languages for system level description of telecom
applications.
In Jean Mermet, editor, Electronic Chips & System Design
Languages, chapter 15, pages 181--192. Kluwer Academic Publisher, 2001.
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.pdf ]
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[10]
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Yutai Ma, Axel Jantsch, and Hannu Tenhunen.
A flexible register access control for programmable protocol
processors.
In Proceedings of the 44th Midwest Symposium on Circuits and
Systems (MWSCAS), August 2001.
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.pdf ]
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