[1]
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Masoumeh Ebrahimi, Junshi Wang, Letian Huang, Masoud Daneshtalab, and Axel
Jantsch.
Rescuing healthy cores against disabled routers.
In Proceedings of the International Symposium on Defect and
Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), Amsterdam,
October 2014.
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.pdf ]
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[2]
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Mohammad-Hashem Haghbayan, Amir-Mohammad Rahmani, Awet Yemane Weldezion, Pasi
Liljeberg, Juha Plosila, Axel Jantsch, and Hannu Tenhunen.
Dark silicon aware power management for manycore systems under
dynamic workloads.
In Proceedings of the International Conference on Computer
Design, Seoul, South Korea, October 2014.
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.pdf ]
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[3]
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Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Minglun Gao, Hongbing Pan, and
Feng Han.
A survey of memory architecture for 3d chip multi-processors.
Microprocessors and Microsystems, July 2014.
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DOI |
http ]
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[4]
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Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Yuxiang Fu, and Minglun Gao.
Performance and network power evaluation of tightly mixed SRAM
NUCA for 3D multi-core network on chips.
In IEEE International Symposium on Circuits and Systems
(ISCAS), pages 1961--1964, June 2014.
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DOI |
http ]
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[5]
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Shaoteng Liu, Axel Jantsch, and Zhonghai Lu.
Parallel probe based dynamic connection setup in TDM NoCs.
In Proceedings of the Design Automation and Test Europe
Conference (DATE), March 2014.
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.pdf ]
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[6]
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Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming Chen, Yang Guo, and Hengzhu
Liu.
Cooperative communication for efficient and scalable all-to-all
barrier synchronization on mesh-based many-core nocs.
IEICE Electronics Express, 11(18):20140542--20140542, 2014.
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DOI ]
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[7]
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Axel Jantsch and Kalle Tammemäe.
A framework of awareness for artificial subjects.
In Proceedings of the 2014 International Conference on
Hardware/Software Codesign and System Synthesis, CODES '14, pages
20:1--20:3, New York, NY, USA, 2014. ACM.
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DOI |
http ]
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[8]
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Abbas Eslami Kiasari, Axel Jantsch, and Zhonghai Lu.
A heuristic framework for designing and exploring deterministic
routing algorithm for NoCs.
In Maurizio Palesi and Masoud Daneshtalab, editors, Routing
Algorithms in Networks-on-Chip, chapter 2, pages 21--40. Springer, 2014.
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http ]
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[9]
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Konstantinos Tatas, Kostas Siozios, Dimitrios Soudris, and Axel Jantsch.
Designing 2D and 3D Network-on-Chip Architectures.
Springer, 2014.
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