A. Jantsch's Graduated Ph.D. Students

[1] Mattias O'Nils. Specification, Syntheisis and Validation of Hardware/Software Interfaces. PhD thesis, Department of Electronics, Royal Institute of Technology, Stockholm, Sweden, June 1999. [ .ps ]
[2] Per Bjuréus. High-Level Modeling and Evaluation of Embedded Real-Time Systems. PhD thesis, Department of Microelectronics and Information Technology, Royal Institute of Technology, Stockholm, Sweden, June 2002. TRITA-IMIT-LECS-02-03.
[3] Ingo Sander. System Modeling and Design Refinement in ForSyDe. PhD thesis, Department of Microelectronics and Information Technology, Royal Institute of Technology, Stockholm, Sweden, May 2003. TRITA-IMIT-LECS AVH 03:03. [ .pdf ]
[4] Abhijit Kumar Deb. System Design for DSP Applications with the MASIC Methodology. PhD thesis, Royal Institute of Technology, Stockholm, September 2004. [ .pdf ]
[5] Zhonghai Lu. Design and Analysis of On-Chip Communication for Network-on-Chip Platforms. PhD thesis, Royal Institute of Technology, Stockholm, March 2007. ISBN 978-91-7178-580-0, TRITA-ICT/ECS AVH 07:02. [ .pdf ]
[6] Tarvo Raudvere. System Level Techniques for Verification and Synchronization after Local Design Refinements. PhD thesis, Royal Institute of Technology, Stockholm, August 2007. ISBN 978-91-7178-677-7, TRITA-ICT/ECS AVH 07:05. [ .pdf ]
[7] Iyad Al-Khatib. Performance Analysis of Application Specific Multicore Systems on Chip. PhD thesis, School of Information and Communication Technology, Royal Institute of Technology, Isafjordsgatan 39, 16440 Kista, Sweden, June 2008. TRITA-ICT/ECS AVH 08:06. [ .pdf ]
[8] Jun Zhu. Performance Analysis and Implementation of Predictable Streaming Applications on Multiprocessor Systems-on-Chip. PhD thesis, Royal Institute of Technology, Isafjordsgatan 39, SE-16440 Kista, Sweden, December 2010. TRITA-ICT/ECS AVH 09:02. [ .pdf ]
[9] Ming Liu. Adaptive Computing based on FPGA Run-Time Reconfigurability. PhD thesis, Royal Institute of Technology, Isafjordsgatan 39, SE-16440 Kista, Sweden, June 2011. TRITA-ICT/ECS AVH 11:05. [ .pdf ]
[10] Mikael Millberg. Architectural Techniques for Improving Performance in Networks on Chip. PhD thesis, Royal Institute of Technology, Isafjordsgatan 39, SE-16440 Kista, Sweden, December 2011. [ .pdf ]
[11] Huimin She. Performance Analysis and Deployment Techniques for Wireless Sensor Networks. PhD thesis, School of Information and Communication Technology, Royal Institute of Technology, Isafjordsgatan 39, 16440 Kista, Sweden, May 2012. TRITA-ICT/ECS AVH 12:02. [ .pdf ]
[12] Abdul Naeem. Architecture Support and Scalability Analysis of Memory Consistency Models in Network-on-Chip based Systems. PhD thesis, School of Information and Communication Technology, Royal Institute of Technology, Isafjordsgatan 39, 16440 Kista, Sweden, February 2013. TRITA-ICT/ECS AVH 12:11. [ .pdf ]
[13] Abbas Eslami Kiasari. Performance Analysis and Design Space Exploration of On-Chip Interconnection Networks. PhD thesis, School of Information and Communication Technology, Royal Institute of Technology, Isafjordsgatan 39, 16440 Kista, Sweden, October 2013. TRITA-ICT/ECS AVH 13:21. [ .pdf ]
[14] Fahimeh Jafari. Analysis and Management of Communication in On-Chip Networks. PhD thesis, School of Information and Communication Technology, Royal Institute of Technology, Isafjordsgatan 39, 16440 Kista, Sweden, May 2015. TRITA-ICT/ECS AVH 15:01. [ .pdf ]
[15] Shaoteng Liu. New circuit switching techniques in on-chip networks. PhD thesis, Royal Institute of Technology, Isafjordsgatan 39, SE-16440 Kista, Sweden, December 2015. TRITA-ICT 2015:18. [ .pdf ]
[16] Christian Krieg. Pattern-Based Hardware Trojan Characterization for Design Security Assessment. PhD thesis, TU Wien, Gusshausstrasse 27--29 / 384, 1040 Vienna, Austria, January 2019. Co-Supervisor.

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Friday, 19 January 2024, 07:36:23